1. Field of the Invention
The present invention relates to a negative voltage level shifter, and more particularly, to a negative voltage level shifter having simplified structure.
2. Description of the Prior Art
Historically, the primary mode of reducing power consumption in electronic circuits has been to insistently scale down the power supply voltage. Recently, a move to 1.8 V power supply has been popularized among low-power and high-speed circuit designers. However, problems may arise when a low-voltage integrated circuit is coupled to a high-voltage integrated circuit, or when the output signal of an integrated circuit having positive operating voltage swing is utilized for driving another integrated circuit having negative operating voltage swing. That is, when a front-end integrated circuit having a first operating voltage swing is coupled to a back-end integrated circuit having a second operating voltage swing, the first operating voltage swing of the output signal generated by the front-end integrated circuit is required to be converted into the second operating voltage swing by making use of a voltage conversion interface.
Please refer to FIG. 1, which is a circuit diagram schematically showing a prior-art negative voltage level shifter. As shown in FIG. 1, the negative voltage level shifter 100 comprises a first voltage level processing unit 110, an inverting unit 150, and a second voltage level processing unit 160. The negative voltage level shifter 100 is powered with a positive supply voltage Vcc, a negative supply voltage −Vpp, and a middle negative supply voltage −Vpp/2. The negative voltage level shifter 100 receives an input signal Sin having a positive operating voltage swing, e.g. between 0V and the positive supply voltage Vcc, generated by a first circuit unit 101 and functions to convert the input signal Sin into an output signal Sout having a negative operating voltage swing, e.g. between 0V and the negative supply voltage −Vpp, for use in a second circuit unit 102. The first voltage level processing unit 110 is employed to convert the input signal Sin into a first internal signal Sintx1 having an operating voltage swing between −Vpp/2 and Vcc. The inverting unit 150 is utilized for inverting the first internal signal Sintx1 to generate a second internal signal Sintx2 having an operating voltage swing between −Vpp/2 and 0V. The second voltage level processing unit 160 is employed to convert the second internal signal Sintx2 into the output signal Sout having desired negative operating voltage swing between 0V and −Vpp.
The first voltage level processing unit 110 comprises an inverter 120, PMOS (P-type metal oxide semiconductor) transistors 126 and 127, and NMOS (N-type metal oxide semiconductor) transistors 131 and 132. The NMOS transistors 131 and 132 are electrically connected to form a latch circuit 140. The inverting unit 150 comprises a PMOS transistor 151 and an NMOS transistor 152. The second voltage level processing unit 160 comprises PMOS transistors 161˜163 and NMOS transistors 171˜173. The PMOS transistor 161 and the NMOS transistor 171 are electrically connected to form an inverter 170. The NMOS transistors 172 and 173 are electrically connected to form a latch circuit 190. That is, the negative voltage level shifter 100 performs a negative voltage level shifting operation based on two voltage level processing units 110, 160 interfaced by the inverting unit 150. Since the circuit operation of the negative voltage level shifter 100 is performed with the aid of two negative supply voltages −Vpp and −Vpp/2, more complicated peripheral circuits are required to generate the negative supply voltages −Vpp and −Vpp/2. Furthermore, during the circuit operation of the negative voltage level shifter 100, the maximum voltage stress, occurring to the PMOS transistors 126, 127 and the NMOS transistors 131, 132, 152, reaches a high voltage drop of (Vcc+Vpp/2), i.e. between the positive supply voltage Vcc and the middle negative supply voltage −Vpp/2. In view of that, the circuit of the negative voltage level shifter 100 is complicated and costly due to the demand of latch circuits and high voltage transistors for use therein.